@article{nadal:hal-03344261, TITLE = {{Parallel and Flexible 5G LDPC Decoder Architecture Targeting FPGA}}, AUTHOR = {Nadal, Jeremy and Baghdadi, Amer}, URL = {https://imt-atlantique.hal.science/hal-03344261}, JOURNAL = {{IEEE Transactions on Very Large Scale Integration (VLSI) Systems}}, PUBLISHER = {{IEEE}}, VOLUME = {29}, NUMBER = {6}, PAGES = {1141-1151}, YEAR = {2021}, MONTH = Jun, DOI = {10.1109/TVLSI.2021.3072866}, KEYWORDS = {Field programmable gate array (FPGA) ; fifth generation (5G) ; low-density parity-check (LDPC) ; parallelism ; throughput}, HAL_ID = {hal-03344261}, HAL_VERSION = {v1}, }